1. Field of the Invention
The present invention relates in general to integrated devices made of III-V compound semiconductors and, in particular, to a method of fabricating short-gate-length electrodes for heterojunction field-effect transistors (HFETs) integrated with heterojunction bipolar transistors (HBTs) on a common substrate.
2. Background of the Invention
Integration of multifunction circuit devices, which include more than one device type on a common substrate, in certain applications (such as microwave, millimeter wave, and optoelectronic application) not only increases the performance of the integrated circuits, but also provides a practical solution to achieve greater cost and space reduction. For example, by integrating HBTs and HFETs, such as high-electron-mobility transistors (HEMTs) in general, and pseudomorphic HEMT (pHEMTs) in particular, the low-noise advantages of HEMTs together with the high-power and high-linearity features of HBTs provide microwave circuits with lower noise and higher power than those realized by separately fabricating HEMTs and HBTs in known baseline fabrication techniques and then combining into hybrid circuits.
A number of attempts have been made to integrate HBTs and HFETs on the same substrate. One practical way of such monolithic integrations has been realized by utilizing a stacked-layer structure containing HBT layers on the top of HEMT layers. To fabricate HEMT devices, the top HBT layers must be etched away, followed by a number of processes, such as deposition of gate metal, alloying source/drain metal contacts, as well as passivations and isolations. However, because HBT layer structures are usually very thick (typically >2 μm), the resulting surface topography will show a large difference between the HBT mesa and the region for HEMT devices. Such a large topographical difference considerably limits the minimum attainable gate length and source/drain-to-gate or gate-to-gate spacing during the fabrication of HEMT devices.
Conventionally, the process for fabricating gate electrodes on HEMT consists of a number of steps, including the definition of gate region using photolithography, such as photo-resist (PR) coating, exposure and developing, followed by gate recess wet etching, gate metal deposition, and gate metal lift-off processes. The developed PR pattern for the gate region is trench shaped, which usually displays a narrower opening 11, but a wider base dimension 12, as shown in FIG. 1(a). Furthermore, because the wet etching process is isotropic, typical gate recess also shows undercuts 13, as illustrated in FIG. 1(b). Wider gate recess undercut is detrimental to device high frequency characteristics and has reliability concern due to unstable surface-state on AlGaAs or GaAs layer. On the other hand, although the desired gate length is defined by the narrower opening 11 of the PR trench, the resulting gate length 14 is usually wider than that due to the PR undercuts. FIGS. 2(a) and (b) show the cross-sectional SEM (scanning electron microscopy) images of the fabricated PR trench for defining gate region, and the resulting gate metal electrode and gate recess undercuts, respectively. A widening in gate recess undercuts and gate length can clearly seen in FIG. 2(b).
For the fabrication of integrated HBT/HEMT devices, using the conventional method to fabricate gate electrodes will make the situation even worse, due to the large topographical difference. Using a thinner PR thickness usually leads to a poor coating near the interface between HBT and HEMT devices, and results in gate distortion. However, when a thicker PR thickness was used in order to obtain better coverage, the large aspect ratio of the PR gate trench will further widen the gate recess undercuts and limit the minimum attainable gate length. In addition, the conventional method also makes the fabrication of multiple gates for such integrated HBT/HEMT devices more difficult and hard to control, as schematically shown in FIG. 3. It can be seen that the PR adhesion on the region between gates will be an issue for mass production.
Therefore, it is necessary to develop a method for fabricating short-gate-length electrodes with reduced gate recess undercuts for integrated HBT/HEMT devices with high topographical differences.